Progress

2025-09-15 15:14:20 -04:00
parent 8edbd5aa63
commit 07e8efd979
71 changed files with 964 additions and 364 deletions
--- a/TEST/asm/a64r2/init.asm
+++ b/TEST/asm/a64r2/init.asm
@@ -1,17 +0,0 @@
-#bankdef lwc33bank {
-    #bits 16
-    #addr 0xe000
-    #outp 0
-}
-#bank lwc33bank
-
-#include "kernel.asm"
-
-boot:
-    mov sp, 0
-    mov bp, 0xd000
-    mov sm, 0x0fff
-    jmp $
-    
-#addr 0xffff
-#d16 boot
--- a/TEST/asm/a64r2/kernel.asm
+++ b/TEST/asm/a64r2/kernel.asm
--- a/TEST/asm/a64r2/zlib/stdio.asm
+++ b/TEST/asm/a64r2/zlib/stdio.asm
--- a/TEST/asm/a64r2/zlib/stdlib.asm
+++ b/TEST/asm/a64r2/zlib/stdlib.asm
--- a/TEST/ebnf.z
+++ b/TEST/ebnf.z
@@ -1,54 +0,0 @@
-using stdlib as std;
-using asm;
-
-namespace main;
-
-struct output {
-    string out;
-    string owner;
-}
-//this is a comment
-
-/*
-mutiline
-comment
-*/
-
-class main {
-    int z=0;
-    pointer zp=&z;
-    var p=zp; //auto assigns type
-    array a=[0,2,5,3,5];
-    output o=new output {
-        out="HI";
-    }
-    void main(int hello) {
-        if (hello>0) {
-            while (true) {
-                hello=hello-1
-                if (hello==0) {
-                    break
-                }
-            }
-        }
-        if (hello!=nil) {
-            std.printTosStdout(new output {
-                out="ERROR";
-            })
-        }
-        for (int i=9; i~=0&&true; i--) {
-            repeat (5) {
-                repeat (true) {
-                    std.printTosStdout(new output {
-                        out="HELLO";
-                        owner="main";
-                    })
-                }
-            }
-        }
-        return (str(new string "hello"))
-    }
-    string str(string st) {
-        return (st)
-    }
-}
--- a/TEST/lib/controller.z
+++ b/TEST/lib/controller.z
@@ -1,33 +0,0 @@
-using stdlib;
-namespace controller;
-
-const BUTTON_A = 16;
-const BUTTON_B = 32;
-
-const BUTTON_JMP = 64;
-const BUTTON_UP = 1;
-const BUTTON_LEFT = 8;
-const BUTTON_DOWN = 4;
-const BUTTON_RIGHT = 2;
-
-string getButton(int button) {
-    if (button == BUTTON_A) {
-        return "A"
-    } else if (button == BUTTON_B) {
-        return "B"
-    } else if (button == BUTTON_JMP) {
-        return "JMP"
-    } else if (button == BUTTON_UP) {
-        return "UP"
-    } else if (button == BUTTON_LEFT) {
-        return "LEFT"
-    } else if (button == BUTTON_DOWN) {
-        return "DOWN"
-    } else if (button == BUTTON_RIGHT) {
-        return "RIGHT"
-    } else {
-        return "INVALID"
-    }
-
-
-}
--- a/TEST/main.z
+++ b/TEST/main.z
@@ -1,34 +0,0 @@
-using stdlib.io as io;
-using lib.controller as controller;
-
-namespace pong;
-
-void main() {
-    var pointsA = 0;
-    var pointsB = 0;
-
-    var posPlayerA = [0, 0];
-    var posPlayerB = [0, 0];
-
-    while (true) {
-        if (io.checkSerial(0)) {
-            var inputA = controller.getButton(io.readSerial(0, 8));
-            playerPosA[1] = playerPosA[1] + playerMove(inputA)
-        };
-        if (io.checkSerial(1)) {
-            var inputB = controller.getButton(io.readSerial(1, 8));
-            playerPosB[1] = playerPosB[1] + playerMove(inputB)
-        };
-
-    };
-};
-
-int playerMove(string input) {
-    if (input == "UP") {
-        return 1
-    } else if (input == "DOWN") {
-        return -1
-    } else {
-        return 0
-    };
-};
--- a/TEST/stdlib/io.z
+++ b/TEST/stdlib/io.z
@@ -1,10 +0,0 @@
-namespace stdlib;
-
-public class io {
-    void sendSerial(int port, pointer pointer, int length);
-    pointer readSerial(int port, int length);
-    void checkSerial(int port);
-
-    void sendGpio(int port, int data);
-    int readGpio(int port);
-}
--- a/Test.z
+++ b/Test.z
@@ -0,0 +1,13 @@
+using arch.LWC33;
+
+namespace Test;
+public class Test
+{
+    public static void Main()
+    {
+        for (int i = 0; i < 10; i++)
+        {
+            LWC33.serialOutput(0, i);
+        }
+    }
+}
--- a/ZDelta.ebnf
+++ b/ZDelta.ebnf
@@ -0,0 +1,32 @@
+(* ---------- Program ---------- *)
+
+program
+    = { using-directive }
+      namespace-declaration
+      { type-declaration } ;
+
+using-directive
+    = "using" identifier ["as" identifier] ";" ;
+
+namespace-declaration
+    = "namespace" identifier ";" ;
+
+type-declaration
+    = struct-declaration
+    | class-declaration ;
+
+(* ---------- Structs & Classes ---------- *)
+
+parameter-list
+    = parameter { "," parameter } ;
+
+parameter
+    = identifier identifier ;
+
+function-declaration
+    = identifier identifier "(" [ parameter-list ] ")" block ;
+
+(* ---------- Atomics ---------- *)
+
+atomic-declaration
+    = "At
--- a/ZDelta.ebnf.old
+++ b/ZDelta.ebnf.old
@@ -170,4 +170,4 @@ digit

 comment
    = "//" { character }
-    | "/*" { character } "*/" ;
+    | "/*" { character } "*/" ;
--- a/ZDelta/.idea/.idea.ZDelta/.idea/.gitignore
+++ b/ZDelta/.idea/.idea.ZDelta/.idea/.gitignore
@@ -0,0 +1,13 @@
+# Default ignored files
+/shelf/
+/workspace.xml
+# Rider ignored files
+/contentModel.xml
+/projectSettingsUpdater.xml
+/modules.xml
+/.idea.ZDelta.iml
+# Editor-based HTTP Client requests
+/httpRequests/
+# Datasource local storage ignored files
+/dataSources/
+/dataSources.local.xml
--- a/ZDelta/.idea/.idea.ZDelta/.idea/encodings.xml
+++ b/ZDelta/.idea/.idea.ZDelta/.idea/encodings.xml
@@ -0,0 +1,4 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project version="4">
+  <component name="Encoding" addBOMForNewFiles="with BOM under Windows, with no BOM otherwise" />
+</project>
--- a/ZDelta/.idea/.idea.ZDelta/.idea/indexLayout.xml
+++ b/ZDelta/.idea/.idea.ZDelta/.idea/indexLayout.xml
@@ -0,0 +1,8 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project version="4">
+  <component name="UserContentModel">
+    <attachedFolders />
+    <explicitIncludes />
+    <explicitExcludes />
+  </component>
+</project>
--- a/ZDelta/Toolchain/Compiler.cs
+++ b/ZDelta/Toolchain/Compiler.cs
@@ -1,6 +1,9 @@
-namespace ZDelta.Toolchain;
+namespace ZDelta.Toolchain;

 public class Compiler
 {
-    
+    public static data.ZilNode compile(string code)
+    {
+        
+    }
 }
--- a/ZDelta/Toolchain/Lexer.cs
+++ b/ZDelta/Toolchain/Lexer.cs
@@ -0,0 +1,9 @@
+namespace ZDelta.Toolchain;
+
+public class Lexer
+{
+    public static data.AstTree Lex(string code)
+    {
+        
+    }
+}
--- a/ZDelta/Toolchain/Lexer/Lexer.cs
+++ b/ZDelta/Toolchain/Lexer/Lexer.cs
@@ -1,19 +0,0 @@
-using System;
-using System.Collections.Generic;
-namespace ZDelta.Toolchain.Lexer;
-
-public class Lexer
-{
-    string entryFileName;
-    public void Lex(string path)
-    {
-        entryFileName = path;
-        StreamReader file = new StreamReader(path);
-        
-    }
-
-    public void CreateAstKey(string[] key)
-    {
-        
-    }
-}
--- a/ZDelta/Toolchain/Linker.cs
+++ b/ZDelta/Toolchain/Linker.cs
@@ -0,0 +1,9 @@
+namespace ZDelta.Toolchain;
+
+public class Linker
+{
+    public static string Link(data.AssemblyNode[] assemblies)
+    {
+        
+    }
+}
--- a/ZDelta/Toolchain/Linker/Linker.cs
+++ b/ZDelta/Toolchain/Linker/Linker.cs
@@ -1,6 +0,0 @@
-namespace ZDelta.Toolchain.Linker;
-
-public class Linker
-{
-    
-}
--- a/ZDelta/ZDelta.cs
+++ b/ZDelta/ZDelta.cs
@@ -11,7 +11,6 @@ class ZDelta
            Console.WriteLine("    ZDelta (-h --help)");
            Console.WriteLine("    ZDelta (-v --version)");
            Console.WriteLine("    ZDelta (-c --compile) <path>");
-            return;
        }
        else if (args[0] == "-v" || args[0] == "--version")
        {
@@ -19,12 +18,25 @@ class ZDelta
        }
        else if (args[0] == "-c" | args[0] == "--compile")
        {
-            Toolchain.Lexer.Lexer lexer = new Toolchain.Lexer.Lexer();
-            lexer.Lex(args[1]);
+            if (args.Length < 2)
+            {
+                Console.WriteLine("Must specify compile path.");
+            }
+            if (!args[1].EndsWith(".z"))
+            {
+                Console.WriteLine("Must be \".z\" file.");
+                return;
+            }
+            Compile(args);
        }
        else
        {
-            Console.WriteLine("Unknown argument");
+            Console.WriteLine("Unknown argument use -h for operations.");
        }
    }
+
+    static void Compile(string[] args)
+    {
+        
+    }
 }
--- a/ZDelta/ZDelta.csproj
+++ b/ZDelta/ZDelta.csproj
@@ -5,7 +5,6 @@
        <TargetFramework>net8.0</TargetFramework>
        <ImplicitUsings>enable</ImplicitUsings>
        <Nullable>enable</Nullable>
-        <RootNamespace>ZDelta</RootNamespace>
    </PropertyGroup>

 </Project>
--- a/ZDelta/ZDelta.sln
+++ b/ZDelta/ZDelta.sln
@@ -1,6 +1,6 @@

 Microsoft Visual Studio Solution File, Format Version 12.00
-Project("{FAE04EC0-301F-11D3-BF4B-00C04F79EFBC}") = "ZDelta", "ZDelta.csproj", "{7981CE3A-3A1B-4446-B9F5-F18B9D2AD5A9}"
+Project("{FAE04EC0-301F-11D3-BF4B-00C04F79EFBC}") = "ZDelta", "ZDelta.csproj", "{0F4E84A7-B4EE-4E93-91A5-EA046B4CB8AD}"
 EndProject
 Global
 	GlobalSection(SolutionConfigurationPlatforms) = preSolution
@@ -8,9 +8,9 @@ Global
 		Release|Any CPU = Release|Any CPU
 	EndGlobalSection
 	GlobalSection(ProjectConfigurationPlatforms) = postSolution
-		{7981CE3A-3A1B-4446-B9F5-F18B9D2AD5A9}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
-		{7981CE3A-3A1B-4446-B9F5-F18B9D2AD5A9}.Debug|Any CPU.Build.0 = Debug|Any CPU
-		{7981CE3A-3A1B-4446-B9F5-F18B9D2AD5A9}.Release|Any CPU.ActiveCfg = Release|Any CPU
-		{7981CE3A-3A1B-4446-B9F5-F18B9D2AD5A9}.Release|Any CPU.Build.0 = Release|Any CPU
+		{0F4E84A7-B4EE-4E93-91A5-EA046B4CB8AD}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
+		{0F4E84A7-B4EE-4E93-91A5-EA046B4CB8AD}.Debug|Any CPU.Build.0 = Debug|Any CPU
+		{0F4E84A7-B4EE-4E93-91A5-EA046B4CB8AD}.Release|Any CPU.ActiveCfg = Release|Any CPU
+		{0F4E84A7-B4EE-4E93-91A5-EA046B4CB8AD}.Release|Any CPU.Build.0 = Release|Any CPU
 	EndGlobalSection
 EndGlobal
--- a/ZDelta/bin/Debug/net8.0/ZDelta.deps.json
+++ b/ZDelta/bin/Debug/net8.0/ZDelta.deps.json
@@ -6,15 +6,15 @@
  "compilationOptions": {},
  "targets": {
    ".NETCoreApp,Version=v8.0": {
-      "cmm/1.0.0": {
+      "ZDelta/1.0.0": {
        "runtime": {
-          "cmm.dll": {}
+          "ZDelta.dll": {}
        }
      }
    }
  },
  "libraries": {
-    "cmm/1.0.0": {
+    "ZDelta/1.0.0": {
      "type": "project",
      "serviceable": false,
      "sha512": ""
--- a/ZDelta/bin/Debug/net8.0/ZDelta.dll
+++ b/ZDelta/bin/Debug/net8.0/ZDelta.dll
--- a/ZDelta/bin/Debug/net8.0/ZDelta.exe
+++ b/ZDelta/bin/Debug/net8.0/ZDelta.exe
--- a/ZDelta/bin/Debug/net8.0/ZDelta.pdb
+++ b/ZDelta/bin/Debug/net8.0/ZDelta.pdb
--- a/ZDelta/bin/Debug/net8.0/ZDelta.runtimeconfig.json
+++ b/ZDelta/bin/Debug/net8.0/ZDelta.runtimeconfig.json
--- a/ZDelta/bin/Debug/net8.0/cmm
+++ b/ZDelta/bin/Debug/net8.0/cmm
--- a/ZDelta/data/AssemblyNode.cs
+++ b/ZDelta/data/AssemblyNode.cs
@@ -0,0 +1,3 @@
+namespace ZDelta.data;
+
+public record AssemblyNode(string namespaceID, string text, string data);
--- a/ZDelta/data/AstTree.cs
+++ b/ZDelta/data/AstTree.cs
@@ -0,0 +1,3 @@
+namespace ZDelta.data;
+
+public record AstTree(string type, string data);
--- a/ZDelta/data/ZilNode.cs
+++ b/ZDelta/data/ZilNode.cs
@@ -0,0 +1,3 @@
+namespace ZDelta.data;
+
+public record ZilNode(string namespaceID, string directory, string text, string data);
--- a/ZDelta/global.json
+++ b/ZDelta/global.json
@@ -1,7 +0,0 @@
-{
-  "sdk": {
-    "version": "8.0.0",
-    "rollForward": "latestMinor",
-    "allowPrerelease": false
-  }
-}
--- a/ZDelta/obj/Debug/net8.0/.NETCoreApp,Version=v8.0.AssemblyAttributes.cs
+++ b/ZDelta/obj/Debug/net8.0/.NETCoreApp,Version=v8.0.AssemblyAttributes.cs
@@ -0,0 +1,4 @@
+// <autogenerated />
+using System;
+using System.Reflection;
+[assembly: global::System.Runtime.Versioning.TargetFrameworkAttribute(".NETCoreApp,Version=v8.0", FrameworkDisplayName = ".NET 8.0")]
--- a/ZDelta/obj/Debug/net8.0/ZDelta.GeneratedMSBuildEditorConfig.editorconfig
+++ b/ZDelta/obj/Debug/net8.0/ZDelta.GeneratedMSBuildEditorConfig.editorconfig
@@ -8,6 +8,6 @@ build_property.PlatformNeutralAssembly =
 build_property.EnforceExtendedAnalyzerRules = 
 build_property._SupportedPlatformList = Linux,macOS,Windows
 build_property.RootNamespace = ZDelta
-build_property.ProjectDir = /home/astronand/C--/ZDelta/
+build_property.ProjectDir = C:\Users\007872181\Projects\ZDelta\ZDelta\
 build_property.EnableComHosting = 
 build_property.EnableGeneratedComInterfaceComImportInterop = 
--- a/ZDelta/obj/Debug/net8.0/ZDelta.assets.cache
+++ b/ZDelta/obj/Debug/net8.0/ZDelta.assets.cache
--- a/ZDelta/obj/Debug/net8.0/ZDelta.csproj.CoreCompileInputs.cache
+++ b/ZDelta/obj/Debug/net8.0/ZDelta.csproj.CoreCompileInputs.cache
@@ -0,0 +1 @@
+5d9e140df447de96cce83d61840b1d916386ea01b42a4d56e2f260275236f4c1
--- a/ZDelta/obj/Debug/net8.0/ZDelta.csproj.FileListAbsolute.txt
+++ b/ZDelta/obj/Debug/net8.0/ZDelta.csproj.FileListAbsolute.txt
@@ -0,0 +1,14 @@
+C:\Users\007872181\Projects\ZDelta\ZDelta\bin\Debug\net8.0\ZDelta.exe
+C:\Users\007872181\Projects\ZDelta\ZDelta\bin\Debug\net8.0\ZDelta.deps.json
+C:\Users\007872181\Projects\ZDelta\ZDelta\bin\Debug\net8.0\ZDelta.runtimeconfig.json
+C:\Users\007872181\Projects\ZDelta\ZDelta\bin\Debug\net8.0\ZDelta.dll
+C:\Users\007872181\Projects\ZDelta\ZDelta\bin\Debug\net8.0\ZDelta.pdb
+C:\Users\007872181\Projects\ZDelta\ZDelta\obj\Debug\net8.0\ZDelta.GeneratedMSBuildEditorConfig.editorconfig
+C:\Users\007872181\Projects\ZDelta\ZDelta\obj\Debug\net8.0\ZDelta.AssemblyInfoInputs.cache
+C:\Users\007872181\Projects\ZDelta\ZDelta\obj\Debug\net8.0\ZDelta.AssemblyInfo.cs
+C:\Users\007872181\Projects\ZDelta\ZDelta\obj\Debug\net8.0\ZDelta.csproj.CoreCompileInputs.cache
+C:\Users\007872181\Projects\ZDelta\ZDelta\obj\Debug\net8.0\ZDelta.dll
+C:\Users\007872181\Projects\ZDelta\ZDelta\obj\Debug\net8.0\refint\ZDelta.dll
+C:\Users\007872181\Projects\ZDelta\ZDelta\obj\Debug\net8.0\ZDelta.pdb
+C:\Users\007872181\Projects\ZDelta\ZDelta\obj\Debug\net8.0\ZDelta.genruntimeconfig.cache
+C:\Users\007872181\Projects\ZDelta\ZDelta\obj\Debug\net8.0\ref\ZDelta.dll
--- a/ZDelta/obj/Debug/net8.0/ZDelta.dll
+++ b/ZDelta/obj/Debug/net8.0/ZDelta.dll
--- a/ZDelta/obj/Debug/net8.0/ZDelta.genruntimeconfig.cache
+++ b/ZDelta/obj/Debug/net8.0/ZDelta.genruntimeconfig.cache
@@ -0,0 +1 @@
+5710d91b5190194bd0929f18cb3a81dbbd857568b00f645e3e27699333c0d5d9
--- a/ZDelta/obj/Debug/net8.0/ZDelta.pdb
+++ b/ZDelta/obj/Debug/net8.0/ZDelta.pdb
--- a/ZDelta/obj/Debug/net8.0/apphost
+++ b/ZDelta/obj/Debug/net8.0/apphost
--- a/ZDelta/obj/Debug/net8.0/apphost.exe
+++ b/ZDelta/obj/Debug/net8.0/apphost.exe
--- a/ZDelta/obj/Debug/net8.0/cmm.AssemblyInfo.cs
+++ b/ZDelta/obj/Debug/net8.0/cmm.AssemblyInfo.cs
@@ -1,22 +0,0 @@
-//------------------------------------------------------------------------------
-// <auto-generated>
-//     This code was generated by a tool.
-//
-//     Changes to this file may cause incorrect behavior and will be lost if
-//     the code is regenerated.
-// </auto-generated>
-//------------------------------------------------------------------------------
-
-using System;
-using System.Reflection;
-
-[assembly: System.Reflection.AssemblyCompanyAttribute("cmm")]
-[assembly: System.Reflection.AssemblyConfigurationAttribute("Debug")]
-[assembly: System.Reflection.AssemblyFileVersionAttribute("1.0.0.0")]
-[assembly: System.Reflection.AssemblyInformationalVersionAttribute("1.0.0")]
-[assembly: System.Reflection.AssemblyProductAttribute("cmm")]
-[assembly: System.Reflection.AssemblyTitleAttribute("cmm")]
-[assembly: System.Reflection.AssemblyVersionAttribute("1.0.0.0")]
-
-// Generated by the MSBuild WriteCodeFragment class.
-
--- a/ZDelta/obj/Debug/net8.0/cmm.AssemblyInfoInputs.cache
+++ b/ZDelta/obj/Debug/net8.0/cmm.AssemblyInfoInputs.cache
@@ -1 +0,0 @@
-5814966a52e98c52685364e21906a7f96c63c8e29299d50eac209c32222bacc8
--- a/ZDelta/obj/Debug/net8.0/cmm.GeneratedMSBuildEditorConfig.editorconfig
+++ b/ZDelta/obj/Debug/net8.0/cmm.GeneratedMSBuildEditorConfig.editorconfig
@@ -1,13 +0,0 @@
-is_global = true
-build_property.TargetFramework = net8.0
-build_property.TargetPlatformMinVersion = 
-build_property.UsingMicrosoftNETSdkWeb = 
-build_property.ProjectTypeGuids = 
-build_property.InvariantGlobalization = 
-build_property.PlatformNeutralAssembly = 
-build_property.EnforceExtendedAnalyzerRules = 
-build_property._SupportedPlatformList = Linux,macOS,Windows
-build_property.RootNamespace = cmm
-build_property.ProjectDir = /home/astronand/C--/cmm/
-build_property.EnableComHosting = 
-build_property.EnableGeneratedComInterfaceComImportInterop = 
--- a/ZDelta/obj/Debug/net8.0/cmm.GlobalUsings.g.cs
+++ b/ZDelta/obj/Debug/net8.0/cmm.GlobalUsings.g.cs
@@ -1,8 +0,0 @@
-// <auto-generated/>
-global using global::System;
-global using global::System.Collections.Generic;
-global using global::System.IO;
-global using global::System.Linq;
-global using global::System.Net.Http;
-global using global::System.Threading;
-global using global::System.Threading.Tasks;
--- a/ZDelta/obj/Debug/net8.0/cmm.assets.cache
+++ b/ZDelta/obj/Debug/net8.0/cmm.assets.cache
--- a/ZDelta/obj/Debug/net8.0/cmm.csproj.CoreCompileInputs.cache
+++ b/ZDelta/obj/Debug/net8.0/cmm.csproj.CoreCompileInputs.cache
@@ -1 +0,0 @@
-05b3f3e49891dca46e6d004878402ac918a6e519b9eedac300dd42d32a1aa9a7
--- a/ZDelta/obj/Debug/net8.0/cmm.csproj.FileListAbsolute.txt
+++ b/ZDelta/obj/Debug/net8.0/cmm.csproj.FileListAbsolute.txt
@@ -1,14 +0,0 @@
-/home/astronand/C--/cmm/obj/Debug/net8.0/cmm.GeneratedMSBuildEditorConfig.editorconfig
-/home/astronand/C--/cmm/obj/Debug/net8.0/cmm.AssemblyInfoInputs.cache
-/home/astronand/C--/cmm/obj/Debug/net8.0/cmm.AssemblyInfo.cs
-/home/astronand/C--/cmm/obj/Debug/net8.0/cmm.csproj.CoreCompileInputs.cache
-/home/astronand/C--/cmm/bin/Debug/net8.0/cmm
-/home/astronand/C--/cmm/bin/Debug/net8.0/cmm.deps.json
-/home/astronand/C--/cmm/bin/Debug/net8.0/cmm.runtimeconfig.json
-/home/astronand/C--/cmm/bin/Debug/net8.0/cmm.dll
-/home/astronand/C--/cmm/bin/Debug/net8.0/cmm.pdb
-/home/astronand/C--/cmm/obj/Debug/net8.0/cmm.dll
-/home/astronand/C--/cmm/obj/Debug/net8.0/refint/cmm.dll
-/home/astronand/C--/cmm/obj/Debug/net8.0/cmm.pdb
-/home/astronand/C--/cmm/obj/Debug/net8.0/cmm.genruntimeconfig.cache
-/home/astronand/C--/cmm/obj/Debug/net8.0/ref/cmm.dll
--- a/ZDelta/obj/Debug/net8.0/cmm.dll
+++ b/ZDelta/obj/Debug/net8.0/cmm.dll
--- a/ZDelta/obj/Debug/net8.0/cmm.genruntimeconfig.cache
+++ b/ZDelta/obj/Debug/net8.0/cmm.genruntimeconfig.cache
@@ -1 +0,0 @@
-461d319f2f31f4bc73ca9521d49e5405299e8e8dc43ec9f20d2c5f68dcc0a700
--- a/ZDelta/obj/Debug/net8.0/ref/ZDelta.dll
+++ b/ZDelta/obj/Debug/net8.0/ref/ZDelta.dll
--- a/ZDelta/obj/Debug/net8.0/ref/cmm.dll
+++ b/ZDelta/obj/Debug/net8.0/ref/cmm.dll
--- a/ZDelta/obj/Debug/net8.0/refint/ZDelta.dll
+++ b/ZDelta/obj/Debug/net8.0/refint/ZDelta.dll
--- a/ZDelta/obj/Debug/net8.0/refint/cmm.dll
+++ b/ZDelta/obj/Debug/net8.0/refint/cmm.dll
--- a/ZDelta/obj/ZDelta.csproj.nuget.dgspec.json
+++ b/ZDelta/obj/ZDelta.csproj.nuget.dgspec.json
@@ -1,20 +1,20 @@
 {
  "format": 1,
  "restore": {
-    "/home/astronand/C--/ZDelta/ZDelta.csproj": {}
+    "C:\\Users\\007872181\\Projects\\ZDelta\\ZDelta\\ZDelta.csproj": {}
  },
  "projects": {
-    "/home/astronand/C--/ZDelta/ZDelta.csproj": {
+    "C:\\Users\\007872181\\Projects\\ZDelta\\ZDelta\\ZDelta.csproj": {
      "version": "1.0.0",
      "restore": {
-        "projectUniqueName": "/home/astronand/C--/ZDelta/ZDelta.csproj",
+        "projectUniqueName": "C:\\Users\\007872181\\Projects\\ZDelta\\ZDelta\\ZDelta.csproj",
        "projectName": "ZDelta",
-        "projectPath": "/home/astronand/C--/ZDelta/ZDelta.csproj",
-        "packagesPath": "/home/astronand/.nuget/packages/",
-        "outputPath": "/home/astronand/C--/ZDelta/obj/",
+        "projectPath": "C:\\Users\\007872181\\Projects\\ZDelta\\ZDelta\\ZDelta.csproj",
+        "packagesPath": "C:\\Users\\007872181\\.nuget\\packages\\",
+        "outputPath": "C:\\Users\\007872181\\Projects\\ZDelta\\ZDelta\\obj\\",
        "projectStyle": "PackageReference",
        "configFilePaths": [
-          "/home/astronand/.nuget/NuGet/NuGet.Config"
+          "C:\\Users\\007872181\\AppData\\Roaming\\NuGet\\NuGet.Config"
        ],
        "originalTargetFrameworks": [
          "net8.0"
@@ -58,7 +58,7 @@
              "privateAssets": "all"
            }
          },
-          "runtimeIdentifierGraphPath": "/home/astronand/.dotnet/sdk/8.0.413/PortableRuntimeIdentifierGraph.json"
+          "runtimeIdentifierGraphPath": "C:\\Users\\007872181\\.dotnet\\sdk\\8.0.413/PortableRuntimeIdentifierGraph.json"
        }
      }
    }
--- a/ZDelta/obj/ZDelta.csproj.nuget.g.props
+++ b/ZDelta/obj/ZDelta.csproj.nuget.g.props
@@ -4,12 +4,12 @@
    <RestoreSuccess Condition=" '$(RestoreSuccess)' == '' ">True</RestoreSuccess>
    <RestoreTool Condition=" '$(RestoreTool)' == '' ">NuGet</RestoreTool>
    <ProjectAssetsFile Condition=" '$(ProjectAssetsFile)' == '' ">$(MSBuildThisFileDirectory)project.assets.json</ProjectAssetsFile>
-    <NuGetPackageRoot Condition=" '$(NuGetPackageRoot)' == '' ">/home/astronand/.nuget/packages/</NuGetPackageRoot>
-    <NuGetPackageFolders Condition=" '$(NuGetPackageFolders)' == '' ">/home/astronand/.nuget/packages/</NuGetPackageFolders>
+    <NuGetPackageRoot Condition=" '$(NuGetPackageRoot)' == '' ">$(UserProfile)\.nuget\packages\</NuGetPackageRoot>
+    <NuGetPackageFolders Condition=" '$(NuGetPackageFolders)' == '' ">C:\Users\007872181\.nuget\packages\</NuGetPackageFolders>
    <NuGetProjectStyle Condition=" '$(NuGetProjectStyle)' == '' ">PackageReference</NuGetProjectStyle>
-    <NuGetToolVersion Condition=" '$(NuGetToolVersion)' == '' ">6.13.2</NuGetToolVersion>
+    <NuGetToolVersion Condition=" '$(NuGetToolVersion)' == '' ">6.14.0</NuGetToolVersion>
  </PropertyGroup>
  <ItemGroup Condition=" '$(ExcludeRestorePackageImports)' != 'true' ">
-    <SourceRoot Include="/home/astronand/.nuget/packages/" />
+    <SourceRoot Include="C:\Users\007872181\.nuget\packages\" />
  </ItemGroup>
 </Project>
--- a/ZDelta/obj/cmm.csproj.nuget.dgspec.json
+++ b/ZDelta/obj/cmm.csproj.nuget.dgspec.json
@@ -1,66 +0,0 @@
-{
-  "format": 1,
-  "restore": {
-    "/home/astronand/C--/cmm/cmm.csproj": {}
-  },
-  "projects": {
-    "/home/astronand/C--/cmm/cmm.csproj": {
-      "version": "1.0.0",
-      "restore": {
-        "projectUniqueName": "/home/astronand/C--/cmm/cmm.csproj",
-        "projectName": "cmm",
-        "projectPath": "/home/astronand/C--/cmm/cmm.csproj",
-        "packagesPath": "/home/astronand/.nuget/packages/",
-        "outputPath": "/home/astronand/C--/cmm/obj/",
-        "projectStyle": "PackageReference",
-        "configFilePaths": [
-          "/home/astronand/.nuget/NuGet/NuGet.Config"
-        ],
-        "originalTargetFrameworks": [
-          "net8.0"
-        ],
-        "sources": {
-          "https://api.nuget.org/v3/index.json": {}
-        },
-        "frameworks": {
-          "net8.0": {
-            "targetAlias": "net8.0",
-            "projectReferences": {}
-          }
-        },
-        "warningProperties": {
-          "warnAsError": [
-            "NU1605"
-          ]
-        },
-        "restoreAuditProperties": {
-          "enableAudit": "true",
-          "auditLevel": "low",
-          "auditMode": "direct"
-        }
-      },
-      "frameworks": {
-        "net8.0": {
-          "targetAlias": "net8.0",
-          "imports": [
-            "net461",
-            "net462",
-            "net47",
-            "net471",
-            "net472",
-            "net48",
-            "net481"
-          ],
-          "assetTargetFallback": true,
-          "warn": true,
-          "frameworkReferences": {
-            "Microsoft.NETCore.App": {
-              "privateAssets": "all"
-            }
-          },
-          "runtimeIdentifierGraphPath": "/home/astronand/.dotnet/sdk/8.0.413/PortableRuntimeIdentifierGraph.json"
-        }
-      }
-    }
-  }
-}
--- a/ZDelta/obj/cmm.csproj.nuget.g.props
+++ b/ZDelta/obj/cmm.csproj.nuget.g.props
@@ -1,15 +0,0 @@
-<?xml version="1.0" encoding="utf-8" standalone="no"?>
-<Project ToolsVersion="14.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
-  <PropertyGroup Condition=" '$(ExcludeRestorePackageImports)' != 'true' ">
-    <RestoreSuccess Condition=" '$(RestoreSuccess)' == '' ">True</RestoreSuccess>
-    <RestoreTool Condition=" '$(RestoreTool)' == '' ">NuGet</RestoreTool>
-    <ProjectAssetsFile Condition=" '$(ProjectAssetsFile)' == '' ">$(MSBuildThisFileDirectory)project.assets.json</ProjectAssetsFile>
-    <NuGetPackageRoot Condition=" '$(NuGetPackageRoot)' == '' ">/home/astronand/.nuget/packages/</NuGetPackageRoot>
-    <NuGetPackageFolders Condition=" '$(NuGetPackageFolders)' == '' ">/home/astronand/.nuget/packages/</NuGetPackageFolders>
-    <NuGetProjectStyle Condition=" '$(NuGetProjectStyle)' == '' ">PackageReference</NuGetProjectStyle>
-    <NuGetToolVersion Condition=" '$(NuGetToolVersion)' == '' ">6.13.2</NuGetToolVersion>
-  </PropertyGroup>
-  <ItemGroup Condition=" '$(ExcludeRestorePackageImports)' != 'true' ">
-    <SourceRoot Include="/home/astronand/.nuget/packages/" />
-  </ItemGroup>
-</Project>
--- a/ZDelta/obj/cmm.csproj.nuget.g.targets
+++ b/ZDelta/obj/cmm.csproj.nuget.g.targets
@@ -1,2 +0,0 @@
-<?xml version="1.0" encoding="utf-8" standalone="no"?>
-<Project ToolsVersion="14.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003" />
--- a/ZDelta/obj/project.assets.json
+++ b/ZDelta/obj/project.assets.json
@@ -8,19 +8,19 @@
    "net8.0": []
  },
  "packageFolders": {
-    "/home/astronand/.nuget/packages/": {}
+    "C:\\Users\\007872181\\.nuget\\packages\\": {}
  },
  "project": {
    "version": "1.0.0",
    "restore": {
-      "projectUniqueName": "/home/astronand/C--/ZDelta/ZDelta.csproj",
+      "projectUniqueName": "C:\\Users\\007872181\\Projects\\ZDelta\\ZDelta\\ZDelta.csproj",
      "projectName": "ZDelta",
-      "projectPath": "/home/astronand/C--/ZDelta/ZDelta.csproj",
-      "packagesPath": "/home/astronand/.nuget/packages/",
-      "outputPath": "/home/astronand/C--/ZDelta/obj/",
+      "projectPath": "C:\\Users\\007872181\\Projects\\ZDelta\\ZDelta\\ZDelta.csproj",
+      "packagesPath": "C:\\Users\\007872181\\.nuget\\packages\\",
+      "outputPath": "C:\\Users\\007872181\\Projects\\ZDelta\\ZDelta\\obj\\",
      "projectStyle": "PackageReference",
      "configFilePaths": [
-        "/home/astronand/.nuget/NuGet/NuGet.Config"
+        "C:\\Users\\007872181\\AppData\\Roaming\\NuGet\\NuGet.Config"
      ],
      "originalTargetFrameworks": [
        "net8.0"
@@ -64,7 +64,7 @@
            "privateAssets": "all"
          }
        },
-        "runtimeIdentifierGraphPath": "/home/astronand/.dotnet/sdk/8.0.413/PortableRuntimeIdentifierGraph.json"
+        "runtimeIdentifierGraphPath": "C:\\Users\\007872181\\.dotnet\\sdk\\8.0.413/PortableRuntimeIdentifierGraph.json"
      }
    }
  }
--- a/ZDelta/obj/project.nuget.cache
+++ b/ZDelta/obj/project.nuget.cache
@@ -1,8 +1,8 @@
 {
  "version": 2,
-  "dgSpecHash": "Ld6z5fo0boE=",
+  "dgSpecHash": "pjNyVwo5KXc=",
  "success": true,
-  "projectFilePath": "/home/astronand/C--/ZDelta/ZDelta.csproj",
+  "projectFilePath": "C:\\Users\\007872181\\Projects\\ZDelta\\ZDelta\\ZDelta.csproj",
  "expectedPackageFiles": [],
  "logs": []
 }
--- a/ZDelta/obj/project.packagespec.json
+++ b/ZDelta/obj/project.packagespec.json
@@ -1 +1 @@
-"restore":{"projectUniqueName":"/home/astronand/C--/ZDelta/ZDelta.csproj","projectName":"ZDelta","projectPath":"/home/astronand/C--/ZDelta/ZDelta.csproj","outputPath":"/home/astronand/C--/ZDelta/obj/","projectStyle":"PackageReference","originalTargetFrameworks":["net8.0"],"sources":{"https://api.nuget.org/v3/index.json":{}},"frameworks":{"net8.0":{"targetAlias":"net8.0","projectReferences":{}}},"warningProperties":{"warnAsError":["NU1605"]},"restoreAuditProperties":{"enableAudit":"true","auditLevel":"low","auditMode":"direct"}}"frameworks":{"net8.0":{"targetAlias":"net8.0","imports":["net461","net462","net47","net471","net472","net48","net481"],"assetTargetFallback":true,"warn":true,"frameworkReferences":{"Microsoft.NETCore.App":{"privateAssets":"all"}},"runtimeIdentifierGraphPath":"/home/astronand/.dotnet/sdk/8.0.413/PortableRuntimeIdentifierGraph.json"}}
+"restore":{"projectUniqueName":"C:\\Users\\007872181\\Projects\\ZDelta\\ZDelta\\ZDelta.csproj","projectName":"ZDelta","projectPath":"C:\\Users\\007872181\\Projects\\ZDelta\\ZDelta\\ZDelta.csproj","outputPath":"C:\\Users\\007872181\\Projects\\ZDelta\\ZDelta\\obj\\","projectStyle":"PackageReference","originalTargetFrameworks":["net8.0"],"sources":{"https://api.nuget.org/v3/index.json":{}},"frameworks":{"net8.0":{"targetAlias":"net8.0","projectReferences":{}}},"warningProperties":{"warnAsError":["NU1605"]},"restoreAuditProperties":{"enableAudit":"true","auditLevel":"low","auditMode":"direct"}}"frameworks":{"net8.0":{"targetAlias":"net8.0","imports":["net461","net462","net47","net471","net472","net48","net481"],"assetTargetFallback":true,"warn":true,"frameworkReferences":{"Microsoft.NETCore.App":{"privateAssets":"all"}},"runtimeIdentifierGraphPath":"C:\\Users\\007872181\\.dotnet\\sdk\\8.0.413/PortableRuntimeIdentifierGraph.json"}}
--- a/ZDelta/obj/rider.project.model.nuget.info
+++ b/ZDelta/obj/rider.project.model.nuget.info
@@ -1 +1 @@
-17566848863660973
+17579492849794205
--- a/ZDelta/obj/rider.project.restore.info
+++ b/ZDelta/obj/rider.project.restore.info
@@ -1 +1 @@
-17566848863660973
+17579492849794205
--- a/data/ZDelta/atomic-types.z
+++ b/data/ZDelta/atomic-types.z
@@ -0,0 +1,19 @@
+namespace ZDelta;
+
+class AtomicTypes
+{
+    public atomic<int> atomicInt;
+    public atomic<bool> atomicBool;
+    public atomic<char> atomicChar;
+    public atomic<float> atomicFloat;
+    public atomic<double> atomicDouble;
+
+    public AtomicTypes()
+    {
+        atomicInt = 0;
+        atomicBool = false;
+        atomicChar = '\0';
+        atomicFloat = 0.0f;
+        atomicDouble = 0.0;
+    }
+}
--- a/data/arch/LWC33.zi
+++ b/data/arch/LWC33.zi
@@ -0,0 +1,5 @@
+.class public LWC33 {
+    .method public static sendSerial(){
+        .
+    }   
+}
--- a/data/asm/LWC33.asm
+++ b/data/asm/LWC33.asm
@@ -0,0 +1,374 @@
+#subruledef reg {
+	r0  => 1`4
+	r1  => 2`4
+	r2  => 3`4
+	r3  => 4`4
+	r4  => 5`4
+	r5  => 6`4
+	r6  => 7`4
+	r7  => 8`4
+	r8  => 9`4
+	r9  => 10`4
+	r10 => 11`4
+	r11 => 12`4
+	rr  => 13`4
+	sp  => 14`4
+	st  => 15`4
+}
+
+#subruledef subreg {
+	INT0	=> 0`4
+	INT1	=> 1`4
+	INT2	=> 2`4
+	INT3	=> 3`4
+	INT4	=> 4`4
+	BP		=> 5`4
+	SM		=> 6`4
+	VMV		=> 7`4
+	VMS		=> 8`4
+	VMSG	=> 9`4
+	VMBP	=> 10`4
+	VMSM	=> 11`4
+	CS		=> 12`4
+	DS		=> 13`4
+	SPSWP	=> 14`4
+	CTRL	=> 15`4
+}
+
+#ruledef {
+	brk {i: u4}	=> 0x0 @ i @ 0x00
+	
+	; -- Jumping
+	
+	jmp {addr: u16}	=> 0x1 @ 0x0 @ 0b0000 @ 0b1000 @ addr
+	jmp {op1: reg}	=> 0x1 @ op1 @ 0b0000 @ 0b1000
+	
+	jmp ({addr: u16})	=> 0x1 @ 0x0 @ 0b1000 @ 0b1000 @ addr
+	jmp ({op1: reg})	=> 0x1 @ op1 @ 0b1000 @ 0b1000
+	
+	jmp short {addr: u16}	=> 0x1 @ 0x0 @ 0b0100 @ 0b1000 @ (addr-$-1)`16
+	
+	bcs {addr: u16}	=> 0x1 @ 0x0 @ 0b0100 @ 0b0001 @ (addr-$-1)`16
+	bcc {addr: u16}	=> 0x1 @ 0x0 @ 0b0100 @ 0b1001 @ (addr-$-1)`16
+	bcs {op1: reg}	=> 0x1 @ op1 @ 0b0100 @ 0b0001
+	bcc {op1: reg}	=> 0x1 @ op1 @ 0b0100 @ 0b1001
+	
+	beq {addr: u16}	=> 0x1 @ 0x0 @ 0b0100 @ 0b0010 @ (addr-$-1)`16
+	bne {addr: u16}	=> 0x1 @ 0x0 @ 0b0100 @ 0b1010 @ (addr-$-1)`16
+	beq {op1: reg}	=> 0x1 @ op1 @ 0b0100 @ 0b0010
+	bne {op1: reg}	=> 0x1 @ op1 @ 0b0100 @ 0b1010
+	
+	bmi {addr: u16}	=> 0x1 @ 0x0 @ 0b0100 @ 0b0100 @ (addr-$-1)`16
+	bpl {addr: u16}	=> 0x1 @ 0x0 @ 0b0100 @ 0b1100 @ (addr-$-1)`16
+	bmi {op1: reg}	=> 0x1 @ op1 @ 0b0100 @ 0b0100
+	bpl {op1: reg}	=> 0x1 @ op1 @ 0b0100 @ 0b1100
+	
+	bxa {addr: u16}	=> 0x1 @ 0x0 @ 0b0101 @ 0b0000 @ (addr-$-1)`16
+	bna {addr: u16}	=> 0x1 @ 0x0 @ 0b0101 @ 0b1000 @ (addr-$-1)`16
+	bxa {op1: reg}	=> 0x1 @ op1 @ 0b0101 @ 0b0000
+	bna {op1: reg}	=> 0x1 @ op1 @ 0b0101 @ 0b1000
+	
+	bxb {addr: u16}	=> 0x1 @ 0x0 @ 0b0110 @ 0b0000 @ (addr-$-1)`16
+	bnb {addr: u16}	=> 0x1 @ 0x0 @ 0b0110 @ 0b1000 @ (addr-$-1)`16
+	bxb {op1: reg}	=> 0x1 @ op1 @ 0b0110 @ 0b0000
+	bnb {op1: reg}	=> 0x1 @ op1 @ 0b0110 @ 0b1000
+	
+	; -- Register copy
+	
+	mov {op1: reg}, {op2: reg}	=> 0x2 @ op1 @ op2 @ 0x0
+	mov {op1: reg}, {data: i16}	=> 0x2 @ op1 @ 0x0 @ 0x0 @ data
+	
+	movs {op1: reg}, {op2: reg}	=> 0x2 @ op1 @ op2 @ 0x1
+	movs {op1: reg}, {data: i16}	=> 0x2 @ op1 @ 0x0 @ 0x1 @ data
+	
+	; -- Store & load from memory
+	
+	mov {op1: reg}, [{op2: reg}] 	=> 0x3 @ op1 @ op2 @ 0x0
+	mov {op1: reg}, [{addr: u16}]	=> 0x3 @ op1 @ 0x0 @ 0x0 @ addr
+	mov {op1: reg}, [{op3: reg}+{offset: i16}]	=> 0x3 @ op1 @ 0x0 @ op3 @ offset
+	mov {op1: reg}, [{op3: reg}-{offset: i16}]	=> 0x3 @ op1 @ 0x0 @ op3 @ -offset`16
+	mov {op1: reg}, [{offset: i16}+{op3: reg}]	=> 0x3 @ op1 @ 0x0 @ op3 @ offset
+	mov {op1: reg}, [{op2: reg}+{op3: reg}]	=> 0x3 @ op1 @ op2 @ op3
+	
+	mov [{op2: reg}], {op1: reg}	=> 0x4 @ op1 @ op2 @ 0x0
+	mov [{op2: reg}], {data: i16}	=> 0x4 @ 0x0 @ op2 @ 0x0 @ data
+	mov [{addr: u16}], {op1: reg}	=> 0x4 @ op1 @ 0x0 @ 0x0 @ addr
+	mov [{op3: reg}+{offset: i16}], {op1: reg}	=> 0x4 @ op1 @ 0x0 @ op3 @ offset
+	mov [{op3: reg}-{offset: i16}], {op1: reg}	=> 0x4 @ op1 @ 0x0 @ op3 @ -offset`16
+	mov [{offset: i16}+{op3: reg}], {op1: reg}	=> 0x4 @ op1 @ 0x0 @ op3 @ offset
+	mov [{op2: reg}+{op3: reg}], {op1: reg}	=> 0x4 @ op1 @ op2 @ op3
+	mov [{op2: reg}+{op3: reg}], {data: i16}	=> 0x4 @ 0x0 @ op2 @ op3 @ data
+	
+	; ALU
+	
+	add {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0x0
+	add {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0x0 @ data
+	add {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0x0 @ data
+	
+	adds {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x0
+	adds {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x0 @ data
+	adds {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x0 @ data
+	
+	adc {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0x1
+	adc {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0x1 @ data
+	adc {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0x1 @ data
+	
+	adcs {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x1
+	adcs {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x1 @ data
+	adcs {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x1 @ data
+	
+	sub {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0x2
+	sub {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0x2 @ data
+	sub {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0x2 @ data
+	
+	subs {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x2
+	subs {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x2 @ data
+	subs {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x2 @ data
+	
+	sbc {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0x3
+	sbc {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0x3 @ data
+	sbc {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0x3 @ data
+	
+	sbcs {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x3
+	sbcs {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x3 @ data
+	sbcs {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x3 @ data
+	
+	and {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0x4
+	and {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0x4 @ data
+	and {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0x4 @ data
+	
+	ands {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x4
+	ands {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x4 @ data
+	ands {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x4 @ data
+	
+	or {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0x5
+	or {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0x5 @ data
+	or {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0x5 @ data
+	
+	ors {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x5
+	ors {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x5 @ data
+	ors {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x5 @ data
+	
+	xor {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0x6
+	xor {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0x6 @ data
+	xor {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0x6 @ data
+	
+	xors {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x6
+	xors {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x6 @ data
+	xors {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x6 @ data
+	
+	rand {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0x7
+	rand {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0x7 @ data
+	
+	rands {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x7
+	rands {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x7 @ data
+	
+	shl {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0x8
+	shl {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0x8 @ data
+	shl {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0x8 @ data
+	
+	shls {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x8
+	shls {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x8 @ data
+	shls {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x8 @ data
+	
+	rol {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0x9
+	rol {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0x9 @ data
+	rol {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0x9 @ data
+	
+	rols {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x9
+	rols {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x9 @ data
+	rols {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x9 @ data
+	
+	shr {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0xa
+	shr {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0xa @ data
+	shr {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0xa @ data
+	
+	shrs {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0xa
+	shrs {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0xa @ data
+	shrs {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0xa @ data
+	
+	ror {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0xb
+	ror {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0xb @ data
+	ror {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0xb @ data
+	
+	rors {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0xb
+	rors {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0xb @ data
+	rors {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0xb @ data
+	
+	mul {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0xc
+	mul {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0xc @ data
+	mul {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0xc @ data
+	
+	muls {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0xc
+	muls {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0xc @ data
+	muls {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0xc @ data
+	
+	smul {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0xd
+	smul {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0xd @ data
+	smul {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0xd @ data
+	
+	smuls {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0xd
+	smuls {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0xd @ data
+	smuls {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0xd @ data
+	
+	div {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0xe
+	div {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0xe @ data
+	div {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0xe @ data
+	
+	divs {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0xe
+	divs {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0xe @ data
+	divs {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0xe @ data
+	
+	sdiv {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0xf
+	sdiv {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0xf @ data
+	sdiv {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0xf @ data
+	
+	sdivs {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0xf
+	sdivs {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0xf @ data
+	sdivs {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0xf @ data
+	
+	; -- Same as subs
+	cmp {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x2
+	cmp {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x2 @ data
+	cmp {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x2 @ data
+	; -- Same as ands
+	bit {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x4
+	bit {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x4 @ data
+	bit {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x4 @ data
+	
+	; -- Subregisters
+	
+	mov {op1: reg}, {op2: subreg}	=> 0x7 @ op1 @ op2 @ 0x0
+	mov {op2: subreg}, {op1: reg}	=> 0x7 @ op1 @ op2 @ 0x1
+	mov {op2: subreg}, {data: i16}	=> 0x7 @ 0x0 @ op2 @ 0x1 @ data
+	
+	; -- Segment jump
+	
+	jps {op1: reg}, {seg: u4}	=> 0x8 @ op1 @ seg @ 0x0
+	jps {addr: u16}, {seg: u4}	=> 0x8 @ 0x0 @ seg @ 0x0 @ addr
+	
+	jmp far {op1: reg}, {seg: u4}	=> 0x8 @ op1 @ seg @ 0x0
+	jmp far {addr: u16}, {seg: u4}	=> 0x8 @ 0x0 @ seg @ 0x0 @ addr
+	
+	jvm {op1: reg}	=> 0x8 @ op1 @ 0x0 @ 0x1
+	jvm {addr: u16}	=> 0x8 @ 0x0 @ 0x0 @ 0x1 @ addr
+	
+	jmp virt {op1: reg}	=> 0x8 @ op1 @ 0x0 @ 0x1
+	jmp virt {addr: u16}	=> 0x8 @ 0x0 @ 0x0 @ 0x1 @ addr
+	
+	; -- Device I/O
+	
+	in {op1: reg}, {op2: reg}	=> 0x9 @ op1 @ op2 @ 0x0
+	in {op1: reg}, {dev: u16}	=> 0x9 @ op1 @ 0x0 @ 0x0 @ dev
+	
+	out {op2: reg}, {op1: reg} 	=> 0x9 @ op1 @ op2 @ 0x1
+	out {op2: reg}, {data: i16} 	=> 0x9 @ 0x0 @ op2 @ 0x1 @ data
+	out {dev: u16}, {op1: reg}	=> 0x9 @ op1 @ 0x0 @ 0x1 @ dev
+	
+	; -- Stack
+	
+	push {op1: reg}	=> 0xa @ op1 @ 0x0 @ 0x0
+	push {data: i16}	=> 0xa @ 0x0 @ 0x0 @ 0x0 @ data
+	
+	pop {op1: reg}	=> 0xb @ op1 @ 0x0 @ 0x0
+	
+	; -- Subroutines
+	
+	jsr {addr: u16}	=> 0xc @ 0x0 @ 0b0000 @ 0b1000 @ addr
+	jsr {op1: reg}	=> 0xc @ op1 @ 0b0000 @ 0b1000
+	
+	jsr short {addr: u16}	=> 0xc @ 0x0 @ 0b0100 @ 0b1000 @ (addr-$-1)`16
+	rjsr {addr: u16}	=> 0xc @ 0x0 @ 0b0100 @ 0b1000 @ (addr-$-1)`16
+	
+	scs {addr: u16}	=> 0xc @ 0x0 @ 0b0100 @ 0b0001 @ (addr-$-1)`16
+	scc {op1: reg}	=> 0xc @ op1 @ 0b0100 @ 0b1001
+	
+	seq {addr: u16}	=> 0xc @ 0x0 @ 0b0100 @ 0b0010 @ (addr-$-1)`16
+	sne {op1: reg}	=> 0xc @ op1 @ 0b0100 @ 0b1010
+	
+	smi {addr: u16}	=> 0xc @ 0x0 @ 0b0100 @ 0b0100 @ (addr-$-1)`16
+	spl {op1: reg}	=> 0xc @ op1 @ 0b0100 @ 0b1100
+	
+	sxa {addr: u16}	=> 0xc @ 0x0 @ 0b0101 @ 0b0000 @ (addr-$-1)`16
+	sna {op1: reg}	=> 0xc @ op1 @ 0b0101 @ 0b1000
+	
+	sxb {addr: u16}	=> 0xc @ 0x0 @ 0b0110 @ 0b0000 @ (addr-$-1)`16
+	snb {op1: reg}	=> 0xc @ op1 @ 0b0110 @ 0b1000
+	
+	rts	=> 0xd000
+	rti	=> 0xe000
+	
+	; -- Other
+	
+	nop	=> 0xf000
+	
+	; Flags
+	
+	sec	=> asm {or st, 0x0001}
+	clc	=> asm {and st, !0x0001}
+	
+	sez	=> asm {or st, 0x0002}
+	clz	=> asm {and st, !0x0002}
+	
+	sen	=> asm {or st, 0x0004}
+	cln	=> asm {and st, !0x0004}
+	
+	sax0	=> asm {or st, 0x0010}
+	clx0	=> asm {and st, !0x0010}
+	
+	sax1	=> asm {or st, 0x0020}
+	clx1	=> asm {and st, !0x0020}
+	
+	sax2	=> asm {or st, 0x0040}
+	clx2	=> asm {and st, !0x0040}
+	
+	sax3	=> asm {or st, 0x0080}
+	clx3	=> asm {and st, !0x0080}
+	
+	sax	=> asm {or st, 0x00f0}
+	clx	=> asm {and st, !0x00f0}
+	
+	sei1	=> asm {or st, 0x0100}
+	cli1	=> asm {and st, !0x0100}
+	
+	sei2	=> asm {or st, 0x0200}
+	cli2	=> asm {and st, !0x0200}
+	
+	sei3	=> asm {or st, 0x0400}
+	cli3	=> asm {and st, !0x0400}
+	
+	sei4	=> asm {or st, 0x0800}
+	cli4	=> asm {and st, !0x0800}
+	
+	sei	=> asm {or st, 0x0f00}
+	cli	=> asm {and st, !0x0f00}
+	
+	sevm	=> asm {or st, 0x1000}
+	clvm	=> asm {and st, !0x1000}
+	
+	saa	=> asm {or st, 0x2000}
+	caa	=> asm {and st, !0x2000}
+	
+	seu	=> asm {or st, 0x4000}
+	clu	=> asm {and st, !0x4000}
+	
+	; Other control
+	
+	backup	=> asm {mov CTRL, 0b1}
+	restore	=> asm {mov CTRL, 0b10}
+	restoregp	=> asm {mov CTRL, 0b100}
+	restorest	=> asm {mov CTRL, 0b1000}
+	
+	; Pause
+	pause	=> asm {
+		clc
+		bcc $
+	}
+}
+
+deviceWrite:
+	; r0 = device
+	; r1 = data
+	mov r2, r0
+	out r2, r1
+	ret
--- a/out/ASM_LWC33.asm
+++ b/out/ASM_LWC33.asm
@@ -0,0 +1,367 @@
+#subruledef reg {
+	r0  => 1`4
+	r1  => 2`4
+	r2  => 3`4
+	r3  => 4`4
+	r4  => 5`4
+	r5  => 6`4
+	r6  => 7`4
+	r7  => 8`4
+	r8  => 9`4
+	r9  => 10`4
+	r10 => 11`4
+	r11 => 12`4
+	rr  => 13`4
+	sp  => 14`4
+	st  => 15`4
+}
+
+#subruledef subreg {
+	INT0	=> 0`4
+	INT1	=> 1`4
+	INT2	=> 2`4
+	INT3	=> 3`4
+	INT4	=> 4`4
+	BP		=> 5`4
+	SM		=> 6`4
+	VMV		=> 7`4
+	VMS		=> 8`4
+	VMSG	=> 9`4
+	VMBP	=> 10`4
+	VMSM	=> 11`4
+	CS		=> 12`4
+	DS		=> 13`4
+	SPSWP	=> 14`4
+	CTRL	=> 15`4
+}
+
+#ruledef {
+	brk {i: u4}	=> 0x0 @ i @ 0x00
+	
+	; -- Jumping
+	
+	jmp {addr: u16}	=> 0x1 @ 0x0 @ 0b0000 @ 0b1000 @ addr
+	jmp {op1: reg}	=> 0x1 @ op1 @ 0b0000 @ 0b1000
+	
+	jmp ({addr: u16})	=> 0x1 @ 0x0 @ 0b1000 @ 0b1000 @ addr
+	jmp ({op1: reg})	=> 0x1 @ op1 @ 0b1000 @ 0b1000
+	
+	jmp short {addr: u16}	=> 0x1 @ 0x0 @ 0b0100 @ 0b1000 @ (addr-$-1)`16
+	
+	bcs {addr: u16}	=> 0x1 @ 0x0 @ 0b0100 @ 0b0001 @ (addr-$-1)`16
+	bcc {addr: u16}	=> 0x1 @ 0x0 @ 0b0100 @ 0b1001 @ (addr-$-1)`16
+	bcs {op1: reg}	=> 0x1 @ op1 @ 0b0100 @ 0b0001
+	bcc {op1: reg}	=> 0x1 @ op1 @ 0b0100 @ 0b1001
+	
+	beq {addr: u16}	=> 0x1 @ 0x0 @ 0b0100 @ 0b0010 @ (addr-$-1)`16
+	bne {addr: u16}	=> 0x1 @ 0x0 @ 0b0100 @ 0b1010 @ (addr-$-1)`16
+	beq {op1: reg}	=> 0x1 @ op1 @ 0b0100 @ 0b0010
+	bne {op1: reg}	=> 0x1 @ op1 @ 0b0100 @ 0b1010
+	
+	bmi {addr: u16}	=> 0x1 @ 0x0 @ 0b0100 @ 0b0100 @ (addr-$-1)`16
+	bpl {addr: u16}	=> 0x1 @ 0x0 @ 0b0100 @ 0b1100 @ (addr-$-1)`16
+	bmi {op1: reg}	=> 0x1 @ op1 @ 0b0100 @ 0b0100
+	bpl {op1: reg}	=> 0x1 @ op1 @ 0b0100 @ 0b1100
+	
+	bxa {addr: u16}	=> 0x1 @ 0x0 @ 0b0101 @ 0b0000 @ (addr-$-1)`16
+	bna {addr: u16}	=> 0x1 @ 0x0 @ 0b0101 @ 0b1000 @ (addr-$-1)`16
+	bxa {op1: reg}	=> 0x1 @ op1 @ 0b0101 @ 0b0000
+	bna {op1: reg}	=> 0x1 @ op1 @ 0b0101 @ 0b1000
+	
+	bxb {addr: u16}	=> 0x1 @ 0x0 @ 0b0110 @ 0b0000 @ (addr-$-1)`16
+	bnb {addr: u16}	=> 0x1 @ 0x0 @ 0b0110 @ 0b1000 @ (addr-$-1)`16
+	bxb {op1: reg}	=> 0x1 @ op1 @ 0b0110 @ 0b0000
+	bnb {op1: reg}	=> 0x1 @ op1 @ 0b0110 @ 0b1000
+	
+	; -- Register copy
+	
+	mov {op1: reg}, {op2: reg}	=> 0x2 @ op1 @ op2 @ 0x0
+	mov {op1: reg}, {data: i16}	=> 0x2 @ op1 @ 0x0 @ 0x0 @ data
+	
+	movs {op1: reg}, {op2: reg}	=> 0x2 @ op1 @ op2 @ 0x1
+	movs {op1: reg}, {data: i16}	=> 0x2 @ op1 @ 0x0 @ 0x1 @ data
+	
+	; -- Store & load from memory
+	
+	mov {op1: reg}, [{op2: reg}] 	=> 0x3 @ op1 @ op2 @ 0x0
+	mov {op1: reg}, [{addr: u16}]	=> 0x3 @ op1 @ 0x0 @ 0x0 @ addr
+	mov {op1: reg}, [{op3: reg}+{offset: i16}]	=> 0x3 @ op1 @ 0x0 @ op3 @ offset
+	mov {op1: reg}, [{op3: reg}-{offset: i16}]	=> 0x3 @ op1 @ 0x0 @ op3 @ -offset`16
+	mov {op1: reg}, [{offset: i16}+{op3: reg}]	=> 0x3 @ op1 @ 0x0 @ op3 @ offset
+	mov {op1: reg}, [{op2: reg}+{op3: reg}]	=> 0x3 @ op1 @ op2 @ op3
+	
+	mov [{op2: reg}], {op1: reg}	=> 0x4 @ op1 @ op2 @ 0x0
+	mov [{op2: reg}], {data: i16}	=> 0x4 @ 0x0 @ op2 @ 0x0 @ data
+	mov [{addr: u16}], {op1: reg}	=> 0x4 @ op1 @ 0x0 @ 0x0 @ addr
+	mov [{op3: reg}+{offset: i16}], {op1: reg}	=> 0x4 @ op1 @ 0x0 @ op3 @ offset
+	mov [{op3: reg}-{offset: i16}], {op1: reg}	=> 0x4 @ op1 @ 0x0 @ op3 @ -offset`16
+	mov [{offset: i16}+{op3: reg}], {op1: reg}	=> 0x4 @ op1 @ 0x0 @ op3 @ offset
+	mov [{op2: reg}+{op3: reg}], {op1: reg}	=> 0x4 @ op1 @ op2 @ op3
+	mov [{op2: reg}+{op3: reg}], {data: i16}	=> 0x4 @ 0x0 @ op2 @ op3 @ data
+	
+	; ALU
+	
+	add {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0x0
+	add {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0x0 @ data
+	add {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0x0 @ data
+	
+	adds {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x0
+	adds {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x0 @ data
+	adds {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x0 @ data
+	
+	adc {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0x1
+	adc {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0x1 @ data
+	adc {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0x1 @ data
+	
+	adcs {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x1
+	adcs {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x1 @ data
+	adcs {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x1 @ data
+	
+	sub {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0x2
+	sub {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0x2 @ data
+	sub {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0x2 @ data
+	
+	subs {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x2
+	subs {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x2 @ data
+	subs {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x2 @ data
+	
+	sbc {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0x3
+	sbc {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0x3 @ data
+	sbc {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0x3 @ data
+	
+	sbcs {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x3
+	sbcs {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x3 @ data
+	sbcs {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x3 @ data
+	
+	and {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0x4
+	and {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0x4 @ data
+	and {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0x4 @ data
+	
+	ands {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x4
+	ands {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x4 @ data
+	ands {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x4 @ data
+	
+	or {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0x5
+	or {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0x5 @ data
+	or {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0x5 @ data
+	
+	ors {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x5
+	ors {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x5 @ data
+	ors {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x5 @ data
+	
+	xor {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0x6
+	xor {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0x6 @ data
+	xor {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0x6 @ data
+	
+	xors {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x6
+	xors {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x6 @ data
+	xors {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x6 @ data
+	
+	rand {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0x7
+	rand {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0x7 @ data
+	
+	rands {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x7
+	rands {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x7 @ data
+	
+	shl {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0x8
+	shl {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0x8 @ data
+	shl {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0x8 @ data
+	
+	shls {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x8
+	shls {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x8 @ data
+	shls {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x8 @ data
+	
+	rol {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0x9
+	rol {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0x9 @ data
+	rol {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0x9 @ data
+	
+	rols {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x9
+	rols {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x9 @ data
+	rols {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x9 @ data
+	
+	shr {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0xa
+	shr {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0xa @ data
+	shr {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0xa @ data
+	
+	shrs {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0xa
+	shrs {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0xa @ data
+	shrs {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0xa @ data
+	
+	ror {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0xb
+	ror {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0xb @ data
+	ror {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0xb @ data
+	
+	rors {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0xb
+	rors {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0xb @ data
+	rors {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0xb @ data
+	
+	mul {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0xc
+	mul {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0xc @ data
+	mul {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0xc @ data
+	
+	muls {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0xc
+	muls {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0xc @ data
+	muls {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0xc @ data
+	
+	smul {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0xd
+	smul {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0xd @ data
+	smul {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0xd @ data
+	
+	smuls {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0xd
+	smuls {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0xd @ data
+	smuls {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0xd @ data
+	
+	div {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0xe
+	div {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0xe @ data
+	div {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0xe @ data
+	
+	divs {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0xe
+	divs {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0xe @ data
+	divs {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0xe @ data
+	
+	sdiv {op1: reg}, {op2: reg}	=> 0x5 @ op1 @ op2 @ 0xf
+	sdiv {op1: reg}, {data: i16}	=> 0x5 @ op1 @ 0x0 @ 0xf @ data
+	sdiv {data: i16}, {op2: reg}	=> 0x5 @ 0x0 @ op2 @ 0xf @ data
+	
+	sdivs {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0xf
+	sdivs {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0xf @ data
+	sdivs {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0xf @ data
+	
+	; -- Same as subs
+	cmp {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x2
+	cmp {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x2 @ data
+	cmp {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x2 @ data
+	; -- Same as ands
+	bit {op1: reg}, {op2: reg}	=> 0x6 @ op1 @ op2 @ 0x4
+	bit {op1: reg}, {data: i16}	=> 0x6 @ op1 @ 0x0 @ 0x4 @ data
+	bit {data: i16}, {op2: reg}	=> 0x6 @ 0x0 @ op2 @ 0x4 @ data
+	
+	; -- Subregisters
+	
+	mov {op1: reg}, {op2: subreg}	=> 0x7 @ op1 @ op2 @ 0x0
+	mov {op2: subreg}, {op1: reg}	=> 0x7 @ op1 @ op2 @ 0x1
+	mov {op2: subreg}, {data: i16}	=> 0x7 @ 0x0 @ op2 @ 0x1 @ data
+	
+	; -- Segment jump
+	
+	jps {op1: reg}, {seg: u4}	=> 0x8 @ op1 @ seg @ 0x0
+	jps {addr: u16}, {seg: u4}	=> 0x8 @ 0x0 @ seg @ 0x0 @ addr
+	
+	jmp far {op1: reg}, {seg: u4}	=> 0x8 @ op1 @ seg @ 0x0
+	jmp far {addr: u16}, {seg: u4}	=> 0x8 @ 0x0 @ seg @ 0x0 @ addr
+	
+	jvm {op1: reg}	=> 0x8 @ op1 @ 0x0 @ 0x1
+	jvm {addr: u16}	=> 0x8 @ 0x0 @ 0x0 @ 0x1 @ addr
+	
+	jmp virt {op1: reg}	=> 0x8 @ op1 @ 0x0 @ 0x1
+	jmp virt {addr: u16}	=> 0x8 @ 0x0 @ 0x0 @ 0x1 @ addr
+	
+	; -- Device I/O
+	
+	in {op1: reg}, {op2: reg}	=> 0x9 @ op1 @ op2 @ 0x0
+	in {op1: reg}, {dev: u16}	=> 0x9 @ op1 @ 0x0 @ 0x0 @ dev
+	
+	out {op2: reg}, {op1: reg} 	=> 0x9 @ op1 @ op2 @ 0x1
+	out {op2: reg}, {data: i16} 	=> 0x9 @ 0x0 @ op2 @ 0x1 @ data
+	out {dev: u16}, {op1: reg}	=> 0x9 @ op1 @ 0x0 @ 0x1 @ dev
+	
+	; -- Stack
+	
+	push {op1: reg}	=> 0xa @ op1 @ 0x0 @ 0x0
+	push {data: i16}	=> 0xa @ 0x0 @ 0x0 @ 0x0 @ data
+	
+	pop {op1: reg}	=> 0xb @ op1 @ 0x0 @ 0x0
+	
+	; -- Subroutines
+	
+	jsr {addr: u16}	=> 0xc @ 0x0 @ 0b0000 @ 0b1000 @ addr
+	jsr {op1: reg}	=> 0xc @ op1 @ 0b0000 @ 0b1000
+	
+	jsr short {addr: u16}	=> 0xc @ 0x0 @ 0b0100 @ 0b1000 @ (addr-$-1)`16
+	rjsr {addr: u16}	=> 0xc @ 0x0 @ 0b0100 @ 0b1000 @ (addr-$-1)`16
+	
+	scs {addr: u16}	=> 0xc @ 0x0 @ 0b0100 @ 0b0001 @ (addr-$-1)`16
+	scc {op1: reg}	=> 0xc @ op1 @ 0b0100 @ 0b1001
+	
+	seq {addr: u16}	=> 0xc @ 0x0 @ 0b0100 @ 0b0010 @ (addr-$-1)`16
+	sne {op1: reg}	=> 0xc @ op1 @ 0b0100 @ 0b1010
+	
+	smi {addr: u16}	=> 0xc @ 0x0 @ 0b0100 @ 0b0100 @ (addr-$-1)`16
+	spl {op1: reg}	=> 0xc @ op1 @ 0b0100 @ 0b1100
+	
+	sxa {addr: u16}	=> 0xc @ 0x0 @ 0b0101 @ 0b0000 @ (addr-$-1)`16
+	sna {op1: reg}	=> 0xc @ op1 @ 0b0101 @ 0b1000
+	
+	sxb {addr: u16}	=> 0xc @ 0x0 @ 0b0110 @ 0b0000 @ (addr-$-1)`16
+	snb {op1: reg}	=> 0xc @ op1 @ 0b0110 @ 0b1000
+	
+	rts	=> 0xd000
+	rti	=> 0xe000
+	
+	; -- Other
+	
+	nop	=> 0xf000
+	
+	; Flags
+	
+	sec	=> asm {or st, 0x0001}
+	clc	=> asm {and st, !0x0001}
+	
+	sez	=> asm {or st, 0x0002}
+	clz	=> asm {and st, !0x0002}
+	
+	sen	=> asm {or st, 0x0004}
+	cln	=> asm {and st, !0x0004}
+	
+	sax0	=> asm {or st, 0x0010}
+	clx0	=> asm {and st, !0x0010}
+	
+	sax1	=> asm {or st, 0x0020}
+	clx1	=> asm {and st, !0x0020}
+	
+	sax2	=> asm {or st, 0x0040}
+	clx2	=> asm {and st, !0x0040}
+	
+	sax3	=> asm {or st, 0x0080}
+	clx3	=> asm {and st, !0x0080}
+	
+	sax	=> asm {or st, 0x00f0}
+	clx	=> asm {and st, !0x00f0}
+	
+	sei1	=> asm {or st, 0x0100}
+	cli1	=> asm {and st, !0x0100}
+	
+	sei2	=> asm {or st, 0x0200}
+	cli2	=> asm {and st, !0x0200}
+	
+	sei3	=> asm {or st, 0x0400}
+	cli3	=> asm {and st, !0x0400}
+	
+	sei4	=> asm {or st, 0x0800}
+	cli4	=> asm {and st, !0x0800}
+	
+	sei	=> asm {or st, 0x0f00}
+	cli	=> asm {and st, !0x0f00}
+	
+	sevm	=> asm {or st, 0x1000}
+	clvm	=> asm {and st, !0x1000}
+	
+	saa	=> asm {or st, 0x2000}
+	caa	=> asm {and st, !0x2000}
+	
+	seu	=> asm {or st, 0x4000}
+	clu	=> asm {and st, !0x4000}
+	
+	; Other control
+	
+	backup	=> asm {mov CTRL, 0b1}
+	restore	=> asm {mov CTRL, 0b10}
+	restoregp	=> asm {mov CTRL, 0b100}
+	restorest	=> asm {mov CTRL, 0b1000}
+	
+	; Pause
+	pause	=> asm {
+		clc
+		bcc $
+	}
+}
--- a/out/Test.asm
+++ b/out/Test.asm
@@ -0,0 +1,20 @@
+#include "arch_LWC33.asm"
+#include "ZDelta.asm"
+
+_Z_Test_Test_Main:
+    mov r0, [_Z_Test_Test_Main_data]
+    _Z_Test_Test_Main_fori:
+    cmp r0, 11
+    bmi _Z_Test_Test_Main_end
+    add r0, 1
+    mov [_Z_Test_Test_Main_data], r0
+    mov r0, 0
+    mov r1, r0
+    jsr _Z_arch_LWC33_serialOutput
+    jmp _Z_Test_Test_Main_fori
+    _Z_Test_Test_Main_end:
+    jmp _Z_EXIT
+
+_Z_Test_Test_Main_data:
+    #d16 0
+    #d16 
--- a/out/ZDelta.asm
+++ b/out/ZDelta.asm
@@ -0,0 +1,7 @@
+#include "ZDelta_Atomic-types.asm"
+#include "ZDelta_Atomic.asm"
+#include "ZDelta_BitStream.asm"
+
+_Z_EXIT:
+    jmp _Z_EXIT
+
				`@@ -0,0 +1 @@`
				`5d9e140df447de96cce83d61840b1d916386ea01b42a4d56e2f260275236f4c1`
				`@@ -0,0 +1 @@`
				`5710d91b5190194bd0929f18cb3a81dbbd857568b00f645e3e27699333c0d5d9`
				`@@ -1 +0,0 @@`
				`5814966a52e98c52685364e21906a7f96c63c8e29299d50eac209c32222bacc8`
				`@@ -1 +0,0 @@`
				`05b3f3e49891dca46e6d004878402ac918a6e519b9eedac300dd42d32a1aa9a7`
				`@@ -1 +0,0 @@`
				`461d319f2f31f4bc73ca9521d49e5405299e8e8dc43ec9f20d2c5f68dcc0a700`